ACC SHELL

style VERILOG is

written by "Edward Arthur <eda@ultranet.com>"
version is 1.0
requires a2ps version 4.9.7

documentation is
  "This style is devoted to the VERILOG hardware description language."
end documentation

alphabets are
   "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz_`\'$0"
case sensitive


keywords in Keyword_strong are

   always, and, assign, begin, buf, bufif0, bufif1, "case", casex,
   casez, cmos, deassign, default, defparam, disable, edge, else,
   "end", endcase, endmodule, endfunction, endprimitive, endspecify,
   endtable, endtask, event, for, force, forever, fork, function,
   highz0, highz1, if, initial, inout, input, integer, join, large,
   macromodule, medium, module, nand, negedge, nmos, nor, not, notif0,
   notif1, or, output, parameter, pmos, posedge, primitive, pull0,
   pull1, pullup, pulldown, rcmos, reg, release, repeat, rnmos, rpmos,
   rtran, rtranif0, rtranif1, scalared, small, specify, specparam,
   strength, strong0, strong1, supply0, supply1, table, task, time,
   tran, tranif0, tranif1, tri, tri0, tri1, triand, trior, trireg,
   vectored, wait, wand, weak0, weak1, while, wire, wor, xnor, xor

end keywords

keywords in Keyword are

   `accelerate, `autoexpand_vectornets, `celldefine, `default_nettype,
   `define, `else, `endcelldefine, `endif, `endprotect, `endprotected,
   `expand_vectornets, `ifdef, `include, `noaccelerate,
   `noexpand_vectornets, `noremove_gatenames, `noremove_netnames,
   `nounconnected_drive, `protect, `protected, `remove_gatenames,
   `remove_netnames, `resetall, `timescale, `unconnected_drive,
   `uselib

end keywords
optional keywords are
   not \not,
   or \vee,
   and \wedge,
   implies \Rightarrow
end keywords

sequences are
    "//" Comment,
    "/*" Comment Comment "*/" Comment,
    C-string,
    "$\\" Keyword Keyword 
	closers are
	  /[ ;(]/ Plain,
	  /$/ Plain,
	  "	" Plain
	end closers
end sequences
end style